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Demo — calc4, self-healing fix loop

A full executive walkthrough of a prompt-to-GDSII run: the pipeline hits a failure, the supervisor reads the real tool log, and the fix loop recovers to an accepted GDSII — with every verdict made by a deterministic gate.
calc4 · Sky130HD POC path · in-image EDA self-healing fix loop 7 deterministic gate verdicts
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What you're watchingThe demo runs the canonical calc4 prompt and shows the pipeline handling a real failure rather than a scripted happy path.

  1. Prompt in. A plain-English spec enters the Step Functions state machine — no human touches the flow after this.
  2. Generate & verify. The design agent writes synthesizable Verilog and a self-checking testbench; lint, formal proof and simulation run as async agent leaves.
  3. A gate fails. A deterministic Lambda gate parses the tool output and returns a verdict — not the model. The run enters the bounded fix loop.
  4. Self-healing. The supervisor reads the actual tool log, extracts file:line guidance, and the design agent repairs the code. Two validation gates (schema + iverilog compile-check) admit the fix before it re-enters the expensive stages.
  5. Accepted GDSII. Synthesis and OpenROAD P&R converge; KLayout streams out a routed GDSII with a SHA-256 manifest, and GateGDSII verifies header, checksum, hierarchy and PDK provenance.
  6. Evidence report. The sign-off report and per-agent cost/token telemetry land in S3 — the same data that feeds the evals dashboard.

Why the fix loop matters

It's the difference between a demo that works once and a system that recovers. Zero-repair calc4 is ~$0.77 / 7 min; each repair adds ~$0.50 and ~4 min — and it's the dominant cost variable.

No model in the verdict

The model wrote the code; the gates judged it. When the gate failed, that was a deterministic Lambda parsing an exit code — reproducible and auditable, not a model opinion.

All in-account

Everything you see ran inside an AWS account with no design IP leaving the boundary. 13 idle AgentCore runtimes cost $0.

Honest framing. The output is engineer-reviewed draft silicon on the Sky130HD open PDK — a verified, routed, checksum-bound block GDSII. Foundry sign-off (DRC, LVS, antenna, extraction, power grid, fill) is separate work; see the tape-out roadmap.